Most computers connect to or include a graphical display device (e.g., a cathode-ray-tube monitor or liquid crystal display) that allows a user to visually interact with different software applications such as word processors, spreadsheets, web browsers, e-mail, drawing packages, DVD or streamed video, and games. The computer renders graphical data to a frame buffer, and that data is then converted to a viewable display. Because graphics display involves many straightforward pixel manipulation tasks that are performed repetitively, it is typical for the main processor of the computer to offload some graphics-related tasks to a graphics processor having direct access to frame buffers. For example, sophisticated 3D drawing packages, 3D computer games, etc., may use the graphics processor to render motion sequences of three-dimensional scenes having a high degree of complexity.
FIG. 1 shows a typical desktop computer system, including a computer 20 in block diagram form. Host processor 22 communicates with a memory interface 24 (sometimes called a memory controller, bridge, or controller-hub) across front-side bus FSB. Memory interface 24 has at least three other ports: a memory bus to main system memory 26; an AGP bus to graphics processor 40; and an I/O hub interface bus to I/O controller hub 30. I/O controller hub 30 provides ports for a variety of other connection types, including ATA/ATAPI (AT Attachment/ATA Packet Interface) connections for devices such as magnetic hard disk drives and optical disk drives, USB (Universal Serial Bus) ports, a PCI (Peripheral Component Interconnect) bus serving PCI expansion slots, and a connection to a low-speed I/O interface circuit 50 that interfaces with parallel ports, floppy disk drive ports, serial ports, mouse and keyboard ports, etc. Together, memory interface 24 and hub 30 are often referred to as a “chipset”.
Graphics processor 40 typically connects to its own dedicated graphics memory 42, which graphics processor 40 uses for frame buffering, z-buffering, polygon data storage, etc. When the computer is running non-graphics-intensive applications, the demands placed upon memory 42 are modest. But when the computer runs graphics-intensive applications such as those that use 3D rendering, graphics processor 40 may require dramatically more memory capacity to create high-quality graphics.
An AGP-capable computer reduces the need for a large graphics memory 42 to support graphics-intensive applications. Instead, the AGP bus provides the graphics processor with sophisticated, pipelined high-speed access into a dedicated area of system memory 26. Graphics processor 40 can then store and retrieve selected graphical elements—such as texture maps—in system memory 26 when graphics memory demands are high. Since system memory pages can be dynamically allocated and de-allocated to graphics processor 40, system memory can be shared such that it is available to other applications when unneeded by the graphics processor.
One problem with allowing graphics processor 40 to use a portion of system memory 26 is that the computer's operating system uses a virtual paged memory system that cannot guarantee a large contiguous block of memory addresses to the graphics processor. Rather than have the graphics processor track non-contiguous memory space and spend time scattering/gathering graphics data to virtual pages, an AGP-capable memory interface 24 provides such a function for the graphics processor.
FIG. 2 shows a memory map 60 for a typical computer. Within the physical address space, the physical RAM (Random Access Memory) occupies a lower range of addresses. Above the top of the physical memory lies memory-mapped I/O space, e.g., valid addresses that can be assigned to various I/O devices. Within the memory-mapped I/O space, it is usually possible to find a large enough block of free contiguous addresses to serve the needs of the graphics processor.
Graphics aperture 70 represents the total memory area available for allocation to the graphics processor. Graphics aperture 70 comprises a set of same-sized AGP aperture pages, of which page 72 is typical. Since these aperture pages do not represent physical memory blocks, each aperture page is mapped to a valid physical page in system memory 26, and the mapping is stored in Graphics Address Remapping Table (GART) 74. When the graphics processor accesses an address that falls within aperture 70, memory interface 24 looks up the appropriate entry in GART 74 and performs the memory access with the corresponding physical page. This operation is transparent to the graphics processor.
AGP allows the operating system to select one of several different fixed graphics aperture sizes. AGP defines the legal aperture sizes of 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, and 4096 MB (megabytes). An AGP-capable memory interface is not required to support all of these sizes, but must support at least some contiguous subrange of these sizes. FIG. 3 depicts an exemplary range of supported aperture sizes, falling between a minimum aperture size 80 and a maximum aperture size 82.
The memory interface maintains the current selected aperture size in coded form in an APSIZE register. The valid APSIZE codes, and their corresponding aperture sizes, are illustrated in FIG. 4. When a memory interface does not support all possible aperture sizes, it is required to hard-wire appropriate bits of its APSIZE register so that it is impossible for an operating system to set an unsupported aperture size.